By Jesús Ruiz-Amaya,Manuel Delgado-Restituto,Ángel Rodríguez-Vázquez

This booklet offers types and strategies to layout pipeline analog-to-digital converters, compensating for gadget inaccuracies, in order that high-performance specifications may be met inside brief layout cycles. those types are in a position to shooting and predicting the habit of pipeline info converters inside below half-a-bit deviation, as opposed to transistor-level simulations. accordingly, a long way fewer version iterations are required around the layout cycle. versions defined during this booklet adequately expect temporary behaviors, that are key to the functionality of discrete-time structures and consequently to the functionality of pipeline facts converters.

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Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs by Jesús Ruiz-Amaya,Manuel Delgado-Restituto,Ángel Rodríguez-Vázquez

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